Welcome to the homepage of the Defect and Fault Tolerance group at the University of Rome "Tor Vergata"


Our research interests are design for test, yield and reliability modeling, fault-tolerant architectures, on-line testing, error correcting codes. We have an established expertise in the design of advanced testing architectures, reliable systems for space applications, and nano scale circuits and systems.

Available Theses

News 2 May 2019

Congratulations to Vishal Gupta for receiving the Best Paper Award at DTIS 2019 with the paper “Perovskite based Low Power Synaptic Memristor Device for Neuromorphic application” authors V. Gupta, G Lucarelli, S. Castro, T. Brown, M. Ottavi

News 4 July 2020

A new patent has been deposited in collaboration with Politecnico di Torino DEVICE FOR IN-MEMORY STORE AND DATA PROCESS details here

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