====== Selected list of publications ======

P. Reviriego, S. Pontarelli, J.A. Maestro, M. Ottavi, "A Method to Construct Low Delay Single Error Correction Codes for Protecting Data Bits Only", Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on vol. 32, no.3, pp. 479-483, 2013. {{:tcad13.pdf|pdf}} \\
/*
(**The Verilog source codes for the ECC proposed in this paper are available** {{:tcad_verilog.zip|here}})
*/

S. Pontarelli, G. Bianchi, S. Teofili, "Traffic-aware Design of a High Speed FPGA Network Intrusion Detection System", accepted for publication on IEEE Transactions on Computers {{:r15-traffic-aware-IDS.pdf|pdf}}

S. Pontarelli, M. Ottavi, "Error Detection and Correction in Content Addressable Memories by Using Bloom Filters",
 IEEE Transactions on Computers, vol. 62,  no. 6, pp. 1111-1126, June 2013 [[http://dftgroup.uniroma2.it/data/media/tc-bf.pdf|pdf]]

S. Pontarelli, M. Ottavi, V. Vankamamidi, G. Cardarilli, F. Lombardi, A. Salsano, "Analysis and Evaluations of Reliability of Reconfigurable FPGAs", Journal of Electronic Testing, vol. 24, no. 1, 2008
{{:r11-analysis_and_evaluations_of_reliability_of_reconfigurable_fpgas.pdf|pdf}}

G. Cardarilli, S. Pontarelli, M. Re, A. Salsano "Concurrent error detection in Reed-Solomon encoders and decoders" IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 15 , Issue 7 (July 2007), 2007 
{{:r9-concurrent_error_detection_in_reed_solomon_encoders_and_decoders.pdf|pdf}}

G. Cardarilli, M. Ottavi, S. Pontarelli, M. Re, A. Salsano "Fault Localization, Error Correction, and Graceful Degradation in Radix 2 Signed Digit-Based Adders", IEEE Transactions on Computers, Volume: 55 , Issue: 5, 2006
{{:r5-fault_localization_error_correction_and_graceful_degradation_in_radix_2_signed_digit-based_adders.pdf|pdf}}


M. Ottavi, S. Pontarelli, V. Vankamamidi, A. Salsano, F. Lombardi, "QCA memory with parallel read/serial write: design and analysis", IEE Circuits, Devices and Systems - Volume: 153 , Issue: 3, 2006. {{:r6-qca_memory_with_parallel_read_serial_write.pdf|pdf}}

M. Ottavi, L. Schiano, F. Lombardi, D. Tougaw "HDLQ: A HDL Environment for QCA Design", ACM Journal on Emerging Technologies in Computing Systems (JETC), vol. 2, no. 4, 2006 {{:hdlq.pdf|pdf}}

M. Ottavi, X. Wang, F.J. Meyer, F. Lombardi, "Simulation of reconfigurable memory core yield", Proceedings of the 14th ACM Great Lakes symposium on VLSI, 2004 {{:glsvlsi04.pdf|pdf}}

G. Cardarilli, A. Leandri, P. Marinucci, M. Ottavi, S. Pontarelli, M. Re, A. Salsano "Design of a Fault Tolerant Solid State Mass Memory", IEEE Transactions on Reliability,  Volume: 52 , Issue: 4, 2003 {{:r2-design_of_a_fault_tolerant_solid_state_mass_memory.pdf|pdf}}


[[complete|Complete List]]

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